Midterm 1 
25% 
Midterm 2 
25% 
Final 
35% 
Quizzes*/Assignments 
15% 
Total 
100% 
Week# 
Topic 
1 
Number Systems 
2 
Boolean Algebra 
3 
Simplification of Boolean Functions using Boolean identities. 
4 
Simplification of Boolean Functions using Kmaps. 
5 
Analysis and design of combinational logic circuit/Midterm I 
6, 7, 8 
Multiput Output Combinational circuits, Design of binary adders, comparators, decoders, encoders, multiplexers, and demultiplexers / Midterm II 
9, 10 
Introduction to Verilog. Structural, Dataflow, and Dataflow Modeling. Verilog description of typical Combination circuits such as decoder, multiplexer, arithmetic circuits / Review. 
11 
Final Exam 
