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Cal Poly Pomona

Jocelyn Mehlsack

Jocelyn Mehlsack

Jocelyn Mehlsack
Electrical Engineer
Raytheon Company, Space
– Design & Analysis
El Segundo, CA

At Raytheon, the majority of my time is spent as a Digital Worst Case Circuit Analyst (DWCCA) for space programs.  This involves analyzing all digital interfaces on boards at their extremes limits, reporting any issues I find and then assisting in the problem solving steps to resolve any issues.

As a Digital Analyst I have:

  • Analyzed several boards as the lead digital analyst
  • Analyzed decoupling on units as the lead analyst using PSpice
  • Worked directly with customers to problem solve issues
  • Applied my knowledge of digital components and their expected behaviors to my digital analysis
  • Written technical papers based on all my digital analysis and knowledge

At the present time, the majority of my time is still focused on board level analysis. In addition to this, I am also analyzing internal and I/O timing on FPGA’s in order to expand my skills and allow me to work on FPGA design.
           
I feel my Electronics and Computer Engineering Technology (ECET) degree has helped me integrate easily into projects that I work on.  My degree allows me to effectively communicate across different disciplines to reach the project goal.  Being an ET major has introduced me to a broad range of tools which are used at my work and makes me an asset to the company already knowing the basics of these tools and easily go from one project to another. I specifically use PSpice in quite of bit of analysis, which was strongly encouraged in the program.  Other software tools such as MatLAB and LabVIEW are used at my work, and being familiar with these programs will allow me to easily transition into different jobs available, as was the case with PSpice.

My experience with working with other Electrical Engineers is that they have not had as much lab experience as I have.  I also have a broader range of knowledge of digital and analog devices.

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